1. Industrial Field of the Invention
The present invention relates to a structure of an insulated gate field effect semiconductor device, and to a process for fabricating the same.
2. Prior Art
Insulated gate field effect semiconductor devices using a thin film semiconductor, particularly a thin film silicon semiconductor, are well known in the art. The devices of this type are called as thin film transistors or TFTs (which are hereinafter referred to collectively as "TFTs"), and are used in active matrix addressed liquid crystal display devices and other integrated circuits.
Referring to FIGS. 2(A) and 2(B), a representative structure of a TFT for the use of switching elements of pixel electrodes and in peripheral driver circuits of a liquid crystal display device is described below. FIG. 2(A) is a cross sectional view of the TFT and FIG. 2(B) is a top planar view of the cross section along line A-A' of FIG. 2(A).
Referring to FIG. 2(A), a base silicon oxide film 202 is formed on a glass substrate 201. The silicon oxide film reduces the diffusion of impurities from the glass substrates to the silicon film formed thereon, and the unfavorable stress applied to the silicon film.
An active layer comprising a source or drain region 203, a drain or source region 205, and a channel forming region 204 is provided on the base film 202. Referring to FIG. 2(A). the island-like regions 203, 204, and 205 correspond to the active layer. The active layer comprises an amorphous silicon film or a crystalline silicon film (generally a polycrystalline silicon or microcrystalline silicon, collectively denoted as "polysilicon").
The source or drain region 203 and the drain or source region 205 are rendered a single conductive type. The channel forming region 204 is basically intrinsic (I-type). An interface 206 is incorporated as a phase boundary. The source or drain region 203 and the drain or source region 205 are fabricated by doping an impurity for imparting the desired conductive type to the regions by means of ion implantation and the like using a gate electrode 208 as a mask.
A silicon oxide film 207 which functions as a gate insulating film is formed on the active layer, and a gate electrode 208 is formed on the gate insulating film. A source or drain electrode 210 and a drain or source electrode 211 are formed with an interlayer insulating film 209 on the upper part of the structure.
Referring to FIG. 2(B), the phase boundary 206 is formed linearly between the source or drain region 203 and the channel forming region 204, and between the drain or source region 205 and the channel forming region.
Because a TFT, as illustrated in FIGS. 2(A) and 2(B), uses a thin film semiconductor having from 1,000 to several thousands of Angstroms in thickness, the current flow between the source and the drain is limited. Thus, the width 214 of the active layer must be increased in case of flowing a current in a larger quantity.
In case the peripheral driver circuit (that is, a circuit for driving a plurality of pixel electrodes arranged into a matrix) of a liquid crystal display device is constructed of TFTs, a large flow of current is required. Thus, with reference to FIG. 2(B), in which the channel width 214 is set at the same width as that 212 of the active layer, it is necessary to form a channel having a width 214 of from 80 to 100 .mu.m with respect to a channel length 213 of about 20 .mu.m.
However, due to the limitation in the size of the element, it is not possible to increase the channel width as required.